Generally, integrated circuits comprise electronic components, such as transistors, capacitors, and the like, formed on and within a wafer. One or more metal layers are formed over the electronic components to provide connections between the electronic components and to provide connections to external devices. Typically, an interlayer dielectric material is deposited, and interconnect structures, such as vias and lines, are formed in the dielectric material, usually through a single- or dual-damascene process.
The trend in the semiconductor industry is towards the miniaturization or scaling of integrated circuits, in order to provide smaller integrated circuits and improved performance, such as increased speed and decreased power consumption. While aluminum and aluminum alloys were most frequently used in the past for the material of conductive lines in integrated circuits, the current trend is to use copper for a conductive material because copper has better electrical characteristics than aluminum, such as higher conductivity, and a higher melting point.
One issue with copper interconnects is that the copper exhibits increased electrical resistivity as the feature sizes of the copper lines or copper vias are decreased below 75 nm. A large fraction of the increased resistivity is believed to be due to the small grain or crystallite size (typically less than about 0.02 microns). Scattering at grain boundaries increases resistance in metals. In order to grow grains within copper lines and copper vias, methods have been implemented to deposit grain growth promotion layers and/or plating seed layers before depositing copper. However, the processes associated with these methods can degrade the functionality of the dielectric material, resulting in leakage and/or an increase in k value. Also, voids in the lines and vias may be created during these processes. Further, these processes may leave small grains in the deeper portions, increasing electromigration.
Accordingly, it is desirable to provide copper interconnects for semiconductor devices with reduced resistivity and increased resistance to electromigration, and methods for fabricating such copper interconnects. In addition, it is desirable to provide interconnects and methods for fabricating interconnects with copper lines having increased grain size and a bamboo microstructure. Furthermore, other desirable features and characteristics will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.